PDF Solutions Inc
PDFS Real Time Price USDRecent trades of PDFS by members of U.S. Congress
No Congress Trading data for this ticker
Congress Trading Dashboard
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Quarterly net insider trading by PDFS's directors and management
Government lobbying spending instances
No Corporate Lobbying instances for this ticker
Corporate Lobbying DashboardEstimated quarterly lobbying spending
No Corporate Lobbying data for this ticker
Corporate Lobbying DashboardNew patents grants
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Patent Title: Collaborative learning model for semiconductor applications Jul. 16, 2024
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Patent Title: Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block Jul. 16, 2024
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Patent Title: Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell Jun. 25, 2024
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Patent Title: Die level product modeling without die level input data Apr. 30, 2024
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Patent Title: Abnormal wafer image classification Apr. 30, 2024
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Patent Title: Rational decision-making tool for semiconductor processes Oct. 03, 2023
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Patent Title: Wafer bin map based root cause analysis Sep. 19, 2023
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Patent Title: Automatic window generation for process trace Jun. 27, 2023
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Patent Title: Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block Jun. 06, 2023
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Patent Title: Predicting equipment fail mode from process trace May. 02, 2023
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Patent Title: Pattern-enhanced spatial correlation of test structures to die level responses May. 02, 2023
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Patent Title: Anomalous equipment trace detection and classification Mar. 21, 2023
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Patent Title: Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell Mar. 14, 2023
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Patent Title: Methods for performing a non-contact electrical measurement on a cell, chip, wafer, die, or logic block May. 24, 2022
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Patent Title: Methods for aligning a particle beam and performing a non-contact electrical measurement on a cell using a registration cell May. 10, 2022
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Patent Title: Predicting die susceptible to early lifetime failure May. 10, 2022
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Patent Title: Maintenance scheduling for semiconductor manufacturing equipment Apr. 05, 2022
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area Aug. 31, 2021
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area Aug. 03, 2021
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area Aug. 03, 2021
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area Jul. 27, 2021
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Patent Title: Generating robust machine learning predictions for semiconductor manufacturing processes Jun. 08, 2021
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Patent Title: Failure detection and classsification using sensor data and/or measurement data Jun. 08, 2021
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Patent Title: Semiconductor yield prediction Jun. 01, 2021
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area May. 25, 2021
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Patent Title: Ic with test structures and e-beam pads embedded within a contiguous standard cell area Apr. 13, 2021
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Patent Title: Characterization vehicles for printed circuit board and system design Jan. 19, 2021
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Patent Title: Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas Dec. 01, 2020
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Patent Title: Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies Dec. 01, 2020
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Patent Title: Snap-to valid pattern system and method Oct. 13, 2020
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Patent Title: Ic with test structures embedded within a contiguous standard cell area Sep. 15, 2020
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Patent Title: Selective inclusion/exclusion of semiconductor chips in accelerated failure tests Sep. 15, 2020
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Patent Title: Method and apparatus for direct testing and characterization of a three dimensional semiconductor memory structure Sep. 08, 2020
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Patent Title: Process control techniques for semiconductor manufacturing processes Aug. 04, 2020
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Patent Title: Direct memory characterization using periphery transistors Jun. 09, 2020
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Patent Title: Failure detection for wire bonding in semiconductors May. 19, 2020
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Patent Title: Passive array test structure for cross-point memory characterization May. 05, 2020
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Patent Title: Method for applying charge-based-capacitance-measurement with switches using only nmos or only pmos transistors May. 05, 2020
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Patent Title: Standard cell design conformance using boolean assertions Feb. 18, 2020
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Patent Title: Method for manufacturing a semiconductor product wafer Jan. 28, 2020
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Patent Title: Test structures and method for electrical measurement of finfet fin height Jan. 07, 2020
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Patent Title: Characterization vehicles for printed circuit board and system design Dec. 24, 2019
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Patent Title: Direct access memory characterization vehicle Sep. 10, 2019
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Patent Title: Direct probing characterization vehicle for transistor, capacitor and resistor testing Aug. 13, 2019
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Patent Title: Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage May. 14, 2019
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Patent Title: Integrated circuit containing first and second does of standard cell compatible, ncem-enabled fill cells, with the first doe including tip-to-side short configured fill cells, and the second doe including corner short configured fill cells Apr. 23, 2019
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Patent Title: Advanced manufacturing insight system for semiconductor application Apr. 23, 2019
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Patent Title: Process for making ics from standard logic cells that utilize ts cut mask(s) and avoid dfm problems caused by closely spaced gate contacts and tscut jogs Apr. 16, 2019
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Patent Title: Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas Feb. 19, 2019
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Patent Title: Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas Feb. 19, 2019
Federal grants, loans, and purchases
No Government Contracts for this ticker
Government Contracts DashboardEstimated quarterly amount awarded from public contracts
Number of mentions of PDFS in WallStreetBets Daily Discussion
Recent insights relating to PDFS
Recent picks made for PDFS stock on CNBC
ETFs with the largest estimated holdings in PDFS
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* These are estimates based on data taken from SEC filings. There may be inaccuracies due to parsing errors, accidental double-counting, incorrect classification of indirectly owned shares, or any other number of issues.
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