Arteris, Inc. Common Stock

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U.S. Patents

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  • Patent Title: Constraints and objectives used in synthesis of a network-on-chip (noc) Nov. 05, 2024
  • Patent Title: Multi-level partitioned snoop filter Sep. 17, 2024
  • Patent Title: System and method to enter and exit a cache coherent interconnect Aug. 27, 2024
  • Patent Title: Automatic configuration of pipeline modules in an electronics system Aug. 20, 2024
  • Patent Title: Testbenches for electronic systems with automatic insertion of verification features Aug. 06, 2024
  • Patent Title: Broadcast adapters in a network-on-chip Jul. 16, 2024
  • Patent Title: Cache coherent system implementing victim buffers Jul. 02, 2024
  • Patent Title: Incremental topology modification of a network-on-chip Apr. 09, 2024
  • Patent Title: System and method for using interface protection parameters Dec. 19, 2023
  • Patent Title: System and method to determine optimal path(s) and use load balancing in an interconnect Dec. 05, 2023
  • Patent Title: Constraints and objectives used in synthesis of a network-on-chip (noc) Dec. 05, 2023
  • Patent Title: Switch with virtual channels for soft locking in a network-on-chip (noc) Nov. 28, 2023
  • Patent Title: System and method for data loss and data latency management in a network-on-chip with buffered switches Oct. 31, 2023
  • Patent Title: Quality metrics for optimization tasks in generation of a network Oct. 10, 2023
  • Patent Title: Management of a buffered switch having virtual channels for data transmission within a network Sep. 12, 2023
  • Patent Title: System and method for predicting performance, power and area behavior of soft ip components in integrated circuit design Sep. 12, 2023
  • Patent Title: System and method to generate a network-on-chip (noc) description using incremental topology synthesis Sep. 05, 2023
  • Patent Title: Broadcast switch system in a network-on-chip (noc) Aug. 15, 2023
  • Patent Title: Optimization of parameters for synthesis of a topology using a discriminant function module Jun. 13, 2023
  • Patent Title: System and method for synthesis of a network-on-chip for deadlock-free transformation May. 30, 2023
  • Patent Title: Multi-phase topology synthesis of a network-on-chip (noc) May. 23, 2023
  • Patent Title: System and method for generation of quality metrics for optimization tasks in topology synthesis of a network Mar. 07, 2023
  • Patent Title: System and method for generating and using a context block based on system parameters Feb. 07, 2023
  • Patent Title: System and method for generating and using physical roadmaps in network synthesis Jan. 17, 2023
  • Patent Title: System and method for configurable cache ip with flushable address range Jan. 17, 2023
  • Patent Title: System and method for using a directory to recover a coherent system from an uncorrectable error Nov. 29, 2022
  • Patent Title: Method for using victim buffer in cache coherent systems Nov. 22, 2022
  • Patent Title: Queue management system, starvation and latency management system, and methods of use Nov. 01, 2022
  • Patent Title: Synthesis of a network-on-chip (noc) using performance constraints and objectives Sep. 20, 2022
  • Patent Title: System and method for transaction broadcast in a network on chip Sep. 06, 2022
  • Patent Title: System and method for synthesis of a network-on-chip to determine optimal path with load balancing Aug. 16, 2022
  • Patent Title: System and method for logic functional redundancy Aug. 16, 2022
  • Patent Title: Generation of hardware design using a constraint solver module for topology synthesis Aug. 09, 2022
  • Patent Title: System for memory access bandwidth management using ecc Jul. 12, 2022
  • Patent Title: System and method for using soft lock with virtual channels in a network-on-chip (noc) Jun. 21, 2022
  • Patent Title: System and method for advanced detection of failures in a network-on-chip Apr. 05, 2022
  • Patent Title: Optimization of parameters for synthesis of a topology using a discriminant function module Mar. 22, 2022
  • Patent Title: Configurable snoop filters for cache coherent systems Feb. 01, 2022
  • Patent Title: System and method for interface protection Dec. 28, 2021
  • Patent Title: Detection and isolation of faults to prevent propagation of faults in a resilient system Nov. 16, 2021
  • Patent Title: Physically aware topology synthesis of a network Sep. 14, 2021
  • Patent Title: System and method for estimation of chip floorplan activity Aug. 24, 2021
  • Patent Title: System and method for computational transport network-on-chip (noc) Aug. 03, 2021
  • Patent Title: Configurable snoop filters for cache coherent systems Aug. 03, 2021
  • Patent Title: System and method for incremental topology synthesis of a network-on-chip Apr. 27, 2021
  • Patent Title: System and method for predicting performance, power and area behavior of soft ip components in integrated circuit design Mar. 16, 2021
  • Patent Title: System and method for isolating faults in a resilient system Jan. 26, 2021
  • Patent Title: Recovery of a coherent system in the presence of an uncorrectable error Dec. 29, 2020
  • Patent Title: System and method for reducing ecc overhead and memory access bandwidth Dec. 15, 2020
  • Patent Title: System and method for designing a chip floorplan using machine learning Oct. 13, 2020
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